EFM8BB2 Datasheet, PDF (16/55 Pages) Silicon Laboratories – The EFM8BB2 highlighted features are listed below

4.1.4 Flash Memory
EFM8BB2 Data Sheet
Electrical Characteristics
Table 4.4. Flash Memory
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Write Time^{1 ,2}
t_WRITE
One Byte,
F_SYSCLK = 24.5 MHz
19
20
21
μs
Erase Time^{1 ,2}
t_ERASE
One Page,
F_SYSCLK = 24.5 MHz
5.2
5.35
5.5
ms
V_DD Voltage During Programming^{3 V}PROG
2.2
—
3.6
V
Endurance (Write/Erase Cycles) N_WE
20k
100k
—
Cycles
Note:
1. Does not include sequencing time before and after the write/erase operation, which may be multiple SYSCLK cycles.
2. The internal High-Frequency Oscillator 0 has a programmable output frequency, which is factory programmed to 24.5 MHz. If
user firmware adjusts the oscillator speed, it must be between 22 and 25 MHz during any flash write or erase operation. It is
recommended to write the HFO0CAL register back to its reset value when writing or erasing flash.
3. Flash can be safely programmed at any voltage above the supply monitor threshold (V_VDDM).
4. Data Retention Information is published in the Quarterly Quality and Reliability Report.
4.1.5 Power Management Timing
Table 4.5. Power Management Timing
Parameter
Idle Mode Wake-up Time
Suspend Mode Wake-up Time
Snooze Mode Wake-up Time
Symbol
Test Condition
t_IDLEWK
t_SUS-
PENDWK
SYSCLK = HFOSC0
CLKDIV = 0x00
t_SLEEPWK SYSCLK = HFOSC0
CLKDIV = 0x00
Min
Typ
Max
Units
2
—
3
SYSCLKs
—
170
—
ns
—
12
—
µs
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