SI5540 Datasheet, PDF (16/20 Pages) Silicon Laboratories – SiPHY OC-192/STM-64 TRANSMITTER

Si5540
Pin Number(s)
J4
A4
D4–7, E4–7,
F4–7, G4–7,
C3
Pin Name
TXMSBSEL
TXSQLCH
VDD
VDD33
I/O
I
I
VDD
VDD33
Signal Level
Description
LVTTL
Data Bus Transmit Order.
For TXMSBSEL = 0, data on TXDIN[0] is trans-
mitted first followed by TXDIN[1] through
TXDIN[15].
For TXMSBSEL = 1, TXDIN[15] is transmitted
first followed by TXDIN[14] through TXDIN[0].
LVTTL
Transmit Data Squelch.
If TXSQLCH is asserted low, the output data
stream on TXDOUT will be forced to 0. If
TXSQLCH = 1, TX squelching is turned off.
1.8 V
Supply Voltage.
Nominally 1.8 V.
1.8 V or 3.3 V
Digital Output Supply.
Must be tied to either 1.8 V or 3.3 V. When tied
to 3.3 V, LVTTL compatible output voltage
swings on TXLOL and FIFOERR are sup-
ported.
16
Preliminary Rev. 0.31