SI5540 Datasheet, PDF (11/20 Pages) Silicon Laboratories – SiPHY OC-192/STM-64 TRANSMITTER

Si5540
Differential Output Circuitry
The Si5540 utilizes a current-mode logic (CML) architecture to drive the high speed serial output clock and data on
TXCLKOUT and TXDOUT. An example of output termination with ac coupling is shown in Figure 4. In applications
where direct dc coupling is possible, the 250 nF capacitors may be omitted. The differential peak-to-peak voltage
swing of the CML architecture is listed in Table 2 on page 5.
1.5 V
50 Ω
50 Ω
250 nF ^{Zo = 50 Ω}
VDD
50 Ω
250 nF Zo = 50 Ω
24 mA
50 Ω
VDD
Figure 4. CML Output Driver Termination (TXCLKOUT, TXDOUT)
Preliminary Rev. 0.31
11