SI5540 Datasheet, PDF (14/20 Pages) Silicon Laboratories – SiPHY OC-192/STM-64 TRANSMITTER

Si5540
Pin Descriptions: Si5540
Pin Number(s)
H3
Pin Name
BWSEL
K1
FIFOERR
K2
FIFORST
B1, C5–8, C2, D8,
D2, E8, E1–2, F8,
F2, G8, G2, H4–
8, H1
H2
GND
NC
A5–6
REFCLK+,
REFCLK–
A2
REFRATE
B3
REFSEL
C4
RESET
I/O
I
O
I
GND
Signal Level
Description
LVTTL
Bandwidth Select DSPLL.
This input selects loop bandwidth of the DSPLL.
BWSEL = 0: Loop bandwidth set to 12 kHz
BWSEL = 1: Loop bandwidth set to 50 kHz.
LVTTL
FIFO Error.
This output is driven high when a FIFO over-
flow/underflow has occurred. This output will
stick high until reset by asserting FIFORST.
LVTTL
FIFO Reset.
This input, when asserted high, resets the read/
write FIFO pointers to their initial state.
GND.
—
No Connect.
Reserved for device testing; leave electrically
unconnected.
I
LVPECL ^{Differential Reference Clock.}
The reference clock sets the operating fre-
quency of the PLL used to generate the output
clock frequency. The Si5540 will operate with
reference clock frequencies that are either 1/
16th or 1/64th the output clock rate.
I
LVTTL
Reference Frequency Select.
This input configures the CMU to operate with
one of two possible reference clock frequen-
cies. When REFRATE = 1, the CMU will oper-
ate with a reference that is 1/16th the output
clock rate. When REFRATE = 0, the CMU will
operate with a reference that is 1/64th the out-
put clock rate.
I
LVTTL
Reference Clock Selection.
This inputs selects the reference clock source
used by the CMU. When REFSEL = 0, the low
speed data input clock, TXCLK16IN, is used as
the CMU reference. When REFSEL = 1, the ref-
erence clock provided on REFCLK is used.
I
LVTTL
Device Reset.
Forcing this input low for at least 1 µs will cause
a device reset. For normal operation, this pin
should be held high.
14
Preliminary Rev. 0.31