SI5316 Datasheet, PDF (14/16 Pages) Silicon Laboratories – PRELIMINARY DATA SHEET PRECISION CLOCK JITTER ATTENUATOR

Si5316
DOCUMENT CHANGE LIST
Revision 0.23 to 0.24
„ Changed LVTTL to LVCMOS in Table 2, “Absolute
Maximum Ratings,” on page 3.
„ Added Figure 1, “Typical Phase Noise Plot,” on page
4.
„ Showed preferred interface for an external reference
clock in Figure 2, “Si5316 Typical Application
Circuit,” on page 5.
„ Updated 3. "Ordering Guide" on page 10.
„ Added “5. Recommended PCB Layout”.
14
Preliminary Rev. 0.24