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SI861X Datasheet, PDF (12/38 Pages) Silicon Laboratories – Low-Power Single and Dual-Channel Digital Isolators
Si861x/2x Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ Max Unit
CL = 15 pF
Output Fall Time
tf
See Figure 4.1 Propa-
—
gation Delay Timing on
page 12
2.5
4.0
ns
Peak Eye Diagram Jitter
tJIT(PK) See Figure 2.3 Eye Di-
—
agram on page 3
350
—
ps
VI = VDD or 0 V
VCM = 1500 V
Common Mode Transient Immunity
CMTI
See Figure 4.2 Com-
Si86xxxB/C/D
mon-Mode Transient
35
Immunity Test Circuit
Si86xxxT
on page 12
60
kV/µs
50
—
100
—
Start-up Time4
tSU
—
15
40
µs
Note:
1. VDD1 = 5 V ±10%; VDD2 = 5 V ±10%, TA = –40 to 125 °C
2. The nominal output impedance of an isolator driver channel is approximately 50 Ω, ±40%, which is a combination of the value of
the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission
line effects will be a factor, output pins should be appropriately terminated with controlled-impedance PCB traces.
3. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same
supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to the appearance of valid data at the output.
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