SI5350C-B Datasheet, PDF (12/31 Pages) Silicon Laboratories – FACTORY-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR

Si5350C-B
4.3.2. Spread Spectrum
Spread spectrum can be enabled on any of the clock outputs that use PLLA as its reference. Spread spectrum is
useful for reducing electromagnetic interference (EMI). Enabling spread spectrum on an output clock modulates its
frequency, which effectively reduces the overall amplitude of its radiated energy. Note that spread spectrum is not
available on clocks synchronized to PLLB.
The Si5350C supports several levels of spread spectrum allowing the designer to choose an ideal compromise
between system performance and EMI compliance. If the CLKIN pin already has spread spectrum applied to it, it
will get passed through to the outputs that are referenced to it. In this case, do not configure the synchronous
outputs for spread spectrum as the device will erroneously try to add additional spread to them.
An optional spread spectrum enable pin (SSEN) is configurable to enable or disable the spread spectrum feature.
See “4.4.1. Spread Spectrum Enable (SSEN)” for details.
Center
Frequency
A m p litud e
Reduced
A m p litud e
and EMI
f_c
No Spread
Spectrum
f_c
Down Spread
Figure 6. Available Spread Spectrum Profiles
4.3.3. Invert/Non-Invert
By default, each of the output clocks are generated in phase (non-inverted) with respect to each other. An option to
invert any of the clock outputs is also available.
4.3.4. Output State When Disabled
There are up to three output enable pins configurable on the Si5350C as described in “4.4.4. Output Enable
(OEB_0, OEB_1, OEB_2)” . The output state when disabled for each of the outputs is configurable as output high,
output low, or high-impedance.
4.3.5. Powering Down Unused Outputs
Unused clock outputs can be completely powered down to conserve power.
4.4. Programmable Control Pins (P0–P3) Options
Up to four programmable control pins (P0-P3) are configurable allowing direct pin control of the following features:
4.4.1. Spread Spectrum Enable (SSEN)
An optional control pin allows disabling the spread spectrum feature for all outputs that were configured with
spread spectrum enabled. Hold SSEN low to disable spread spectrum. The SSEN pin provides a convenient
method of evaluating the effect of using spread spectrum clocks during EMI compliance testing.
4.4.2. Power Down (PDN)
An optional power down control pin allows a full shutdown of the Si5350C to minimize power consumption when its
output clocks are not being used. The Si5350C is in normal operation when the PDN pin is held low and is in power
down mode when held high. Power consumption when the device is in power down mode is indicated in Table 3 on
page 4.
4.4.3. Frequency Select (FS_0, FS_1)
The Si5350C offers the option of configuring up to two frequencies per clock output (CLK0-CLK5) for either free-
running or synchronous clocks. This is a useful feature for applications that need to support more than one free-
running or synchronous clock rate on the same output. An example of this is shown in Figure 7. The FS pins select
which frequency is generated from the clock output. In this example, FS0 selects the output frequency on CLK0
12
Rev. 1.0