SI53102-A1 Datasheet, PDF (12/15 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER

Si53102-A1/A2/A3
6. Package Outlines
Figure 6. 8-Pin TDFN Package Drawing
Table 7. Package Diagram Dimensions
Dimension
Min
Nom
Max
A
0.70
0.75
0.80
A1
0.00
0.02
0.05
A3
0.20 REF.
b
0.15
0.20
0.25
D
1.60 BSC
D2
1.00
1.05
1.10
e
0.40 BSC
E
1.40 BSC
E2
0.20
0.25
0.30
L
0.30
0.35
0.40
aaa
0.10
bbb
0.10
ccc
0.10
ddd
0.07
eee
0.08
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
12
Rev 1.2