SI53102-A1 Datasheet, PDF (10/15 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER

Si53102-A1/A2/A3
4. Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Name
DIFFIN
DIFFIN
DIFF1
DIFF1
GND
DIFF2
DIFF2
VDD
DIFFIN 1
DIFFIN 2
DIFF1 ³
DIFF1 ⁴
8 VDD
7 _DIFF2
6 DIFF2
5 _VSS
Figure 5. 8-Pin TDFN
Table 6. Si53102-Ax-GM 8-Pin TDFN Descriptions
Type
O, DIF
O, DIF
O, DIF
O, DIF
GND
O, DIF
O, DIF
PWR
Description
0.7 V, 100 MHz differentials clock input
0.7 V, 100 MHz differentials clock input
0.7 V, 100 MHz differential clock output
0.7 V, 100 MHz differential clock output
Ground
0.7 V, 100 MHz differential clock output
0.7 V, 100 MHz differential clock output
2.5 V or 3.3 V Power supply
10
Rev 1.2