SI53102-A1 Datasheet, PDF (1/15 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER

Si53102-A1/A2/A3
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2
FAN-OUT CLOCK BUFFER
Features
 PCI-Express Gen 1, Gen 2,
 2.5 V or 3.3 V Power supply
Gen 3, and Gen 4 common clock _{ Spread Spectrum Tolerant}
compliant
 Extended Temperature:
 Two low-power PCIe clock
–40 to 85 °C
outputs
 Small package 8-pin TDFN
 Supports Serial-ATA (SATA) at _{(1.4x1.6 mm)}
100 MHz
 For PCIe Gen 1: Si53102-A1
 No termination resistors required
for differential clocks
 For PCIe Gen 2: Si53102-A2
 For PCIe Gen 3/4: Si53102-A3
Applications
 Network Attached Storage
 Multi-function Printer
 Wireless Access Point
 Server/Storage
Ordering Information:
See page 11
Pin Assignments
Description
Si53102-A1/A2/A3 is a family of high-performance 1:2 PCIe fan output
buffers. This low-additive-jitter clock buffer family is compliant to PCIe
Gen 1, Gen 2, Gen 3, and Gen 4 specifications. The ultra-small footprint
(1.4x1.6 mm) and industry-leading low power consumption make the
Si53102-A1/A2/A3 the ideal clock solution for consumer and embedded
applications. Measuring PCIe clock jitter is quick and easy with the Silicon
Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-
learningcenter.
Functional Block Diagram
DIFFIN 1
DIFFIN 2
DIFF1 ³
DIFF1 ⁴
Patents pending
8 VDD
7 _DIFF2
6 DIFF2
5 _VSS
VDD
DIFFIN
DIFFIN
DIFF1
DIFF2
VSS
Rev 1.2 12/15
Copyright © 2015 by Silicon Laboratories
Si53102-A1/A2/A3