S-8204AAB-TCT1Y Datasheet, PDF (4/34 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC

BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204A Series
Rev.3.5_00
 Pin Configuration
1. 16-Pin TSSOP
Top view
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
Figure 2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
COP
VMP
DOP
VINI
CDT
CCT
CIT
SEL
VSS
VC4
VC3
VC2
VC1
VDD
CTLD
CTLC
Table 3
Description
Connection pin of charge control FET gate (Nch open-drain output)
Voltage detection pin between VDD pin and VMP pin
Connection pin of discharge control FET gate (CMOS output)
Voltage detection pin between VSS pin and VINI pin
• Discharge overcurrent 1 / 2 detection pin, load short-circuit detection pin
• Charge overcurrent detection pin
Capacitor connection pin for delay for overdischarge detection
Capacitor connection pin for delay for overcharge detection
Capacitor connection pin for delay for discharge overcurrent 1 / 2,
capacitor connection pin for delay for charge overcurrent detection
Pin for switching 3-series or 4-series cell
• V_SS level: 3-series cell
• V_DD level: 4-series cell
Input pin for negative power supply,
Connection pin for negative voltage of battery 4
Connection pin for negative voltage of battery 4
Connection pin for negative voltage of battery 3,
Connection pin for positive voltage of battery 4
Connection pin for negative voltage of battery 2,
Connection pin for positive voltage of battery 3
Connection pin for negative voltage of battery 1,
Connection pin for positive voltage of battery 2
Input pin for positive power supply,
Connection pin for positive voltage of battery 1
Discharge FET control pin
Charge FET control pin
4