S-8204AAB-TCT1Y Datasheet, PDF (14/34 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC

BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204A Series
Rev.3.5_00
 Operation
Remark Refer to " Connection Example of Battery Protection IC".
1. Normal status
In the S-8204A Series, both of COP pin and DOP pin get the V_SS level; when the voltage of each of the
batteries is in the range of overdischarge detection voltage (V_DLn) to overcharge detection voltage (V_CUn),
and due to the discharge or charge current, the VINI pin's voltage is in the range of charge overcurrent
detection voltage (V_CIOV) to discharge overcurrent detection voltage 1 (V_DIOV1). This is the normal status.
At this time, the charge FET and the discharge FET are on.
2. Overcharge status
In the S-8204A Series, when the voltage of one of the batteries increases to the level of more than V_CUn,
the COP pin is set in high impedance. This is the overcharge status. The COP pin is pulled up to EB+ by
an external resistor so that the charge FET is turned off and it stops charging.
This overcharge status is released if either condition mentioned below is satisfied;
(1) In case that the VMP pin voltage is set 39 / 40 × V_DS or more; the voltage of each of the batteries is
in the level of overcharge release voltage (V_CLn) or less.
(2) In case that the VMP pin voltage is set 39 / 40 × V_DS or less; the voltage of each of the batteries is
in the level of V_CUn or less.
3. Overdischarge status
In the S-8204A Series, when the voltage of one of the batteries decreases to the level of less than V_DLn,
the DOP pin voltage gets the V_DD level. This is the overdischarge status. At this time, the discharge FET
is turned off and it stops discharging.
This overdischarge status is released / maintained if either condition mentioned below is satisfied;
(1) To release; the VMP pin voltage is in the level of more than V_DD, the voltage of each of the
batteries is in the V_DLn level or more.
(2) To release; the VMP pin voltage is V_DS / 2 or more and the VMP pin voltage is in the level of less
than V_DD; the voltage of each of the batteries is in the level of overdischarge release voltage (V_DUn)
or more.
(3) The VMP pin voltage is V_DS / 2 or less, the S-8204A Series maintains the power-down function.
3. 1 Power-down function
In the S-8204A Series, when it reaches the overdischarge status, the VMP pin is pulled down to the
V_SS level by a resistor between VMP pin and VSS pin (R_VMS). If the VMP pin voltage decreases to the
level of V_DS / 2 or less, the power-down function starts to operate and almost every circuit in the
S-8204A Series stops working.
The power-down function is released if the following condition is satisfied.
(1) The VMP pin voltage gets V_DS / 2 or more.
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