S-19500A03A-E8T1U4 Datasheet, PDF (30/52 Pages) Seiko Instruments Inc – CMOS VOLTAGE REGULATOR WITH WATCHDOG TIMER AND RESET FUNCTION

FOR AUTOMOTIVE 125°C OPERATION HIGH-WITHSTAND VOLTAGE CMOS VOLTAGE REGULATOR WITH WATCHDOG TIMER AND RESET FUNCTION
S-19500/19501 Series
Rev.1.2_01
3. Watchdog timer block
3. 1 Basic operation
The watchdog timer operates as follows during monitoring operation.
(1) When the WO pin outputs "H", CDLY is discharged by an internal constant current source, and the DLY pin
voltage (VDLY) decreases. The watchdog timer detects a trigger and the CDLY is charged by an internal constant
current source if a rising edge is input to the WI pin from a monitored object by the watchdog timer, and then
VDLY rises. The discharge operation is restarted if VDLY reaches the upper timing threshold voltage (VDU), and
VDLY decreases again. By inputting a rising edge to the WI pin again during the discharge operation, the similar
operation is repeated. At this time, the WO pin outputs "H" continuously.
(2) The watchdog timer does not detect a trigger if the rising edge is not input to the WI pin from a monitored object
by the watchdog timer when the CDLY is discharged and VDLY decreases. The WO pin outputs "L" if the
discharge operation continues not detecting a trigger when VDLY reaches the lower watchdog timing threshold
voltage (VDWL). This operation is called the time-out detection.
(3) After the time-out detection, CDLY is charged while the WO pin outputs "L", and VDLY increases. The WO pin
outputs "H" and restarts the discharge operation if VDLY reaches VDU.
(4) By the operation of (3), a monitored object by the watchdog timer is reset. If a rising edge is input to the WI pin
again, the operation similar to (1) is continued since the watchdog timer detects a trigger.
(5) After the operation of (3), if the status in which a rising edge is not input to the WI pin continues, the watchdog
timer repeats the operation of (5) → (3) → (5) →...
VIN
WADJ
WEN
WI
VSS
Output current
detection circuit
WDT enable circuit
Charge-
discharge
control
WDT input circuit
circuit
−
Reference
+
voltage circuit
Figure 42
CDLY
DLY
VOUT
WO
30