S-24C02DI-J8T1U5 Datasheet, PDF (24/47 Pages) Seiko Instruments Inc – Write protect function during low power supply voltage

2-WIRE SERIAL E²PROM
S-24C02D/04D/08D16D
Rev.3.0_01_U
5. 2 Caution when raising the power supply voltage
The internal circuit of this IC is reset by the power-on-clear circuit. In order for the power-on-clear circuit to
operate normally, the condition showed in Table 11 must be obeyed for raising the power supply voltage.
Due to the voltage drop, this IC may not perform normal communication if the power-on-clear operation condition
is not fulfilled, even when the master device is reset.
However, the interface of this IC is reset normally and the master device can make normal communication if
phase adjustment is performed, even when the power-on-clear operation condition of this IC is not fulfilled.
Item
Power-off time
Power-off voltage
Table 11
Symbol
tOFF
VBOT
Min.
100
−
Max.
Unit
−
μs
0.6
V
V_CC min.
Power supply
voltage
0 V^*1
t_INIT^*2
t_OFF
t_INIT^*2
VBOT
*1. 0 V means that there is no potential difference between the VCC pin and the GND pin of this IC.
*2. tINIT is the time to initialize the internal IC. This IC does not accept any instruction during the initialization time.
Figure 22 Caution When Raising the Power Supply Voltage
6. Write protect function during the low power supply voltage
This IC has a built-in detection circuit which operates with the low power supply voltage, cancels Write when the power
supply voltage drops and power-on. Its detection and release voltages are 1.3 V typ. (refer to Figure 23).
This IC cancels Write by detecting a low power supply voltage when it receives a stop condition. In the data trasmission
and the Write operation, data in the address written during the low power supply voltage is not assurable.
Power supply voltage
Detection voltage (−V_DET)
1.3 V typ.
Release voltage (+V_DET)
1.3 V typ.
Write instruction cancel
Figure 23 Operation during Low Power Supply Voltage
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