S-24C02DI-J8T1U5 Datasheet, PDF (20/47 Pages) Seiko Instruments Inc – Write protect function during low power supply voltage

2-WIRE SERIAL E²PROM
S-24C02D/04D/08D16D
Rev.3.0_01_U
8. 3 Sequential read
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "1" following a start
condition both in current address read and random read, it responds with an acknowledge.
When an 8-bit data is output from this IC synchronous to the SCL clock, the address counter is automatically
incremented.
When the master device responds with an acknowledge, the data at the next memory address is transmitted.
Response with an acknowledge by the master device has the memory address counter in this IC incremented and
makes it possible to read data in succession. This is called sequential read.
The master device outputs stop condition not an acknowledge, the reading of this IC is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches the last
word address, it rolls over to the first word address.
R
E
DEVICE A
ADDRESS D
SDA
LINE
1 D7
RA
/C
WK
NO ACK from
Master Device
S
A
A
A
T
C
C
C
O
K
K
K
P
D0 D7
D0 D7
D0 D7
D0
DATA (n)
DATA (n + 1)
DATA (n + 2)
DATA (n + x)
Figure 15 Sequential Read
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