S-25A640A Datasheet, PDF (21/32 Pages) Seiko Instruments Inc – Function to prevent malfunction by monitoring clock pulse

Rev.3.2_01
FOR AUTOMOTIVE 125°C OPERATION SPI SERIAL E²PROM
S-25A640A, S-25A640B
 Write Protect Function during the Low Power Supply Voltage
This IC has a built-in detection circuit which operates with the low power supply voltage. This IC cancels the write
operation (WRITE, WRSR) when the power supply voltage drops and power-on, at the same time, goes in the write
protect status (WRDI) automatically to reset bit WEL.
To operate write, after the power supply voltage dropped once but rose to the voltage level which allows write again, be
sure to set the Write Enable Latch bit (WEL) before operating write (WRITE, WRSR).
In the write operation, data in the address written during the low power supply voltage is not assured.
In the S-25A640A, the detection voltage is 1.20 V typ., the release voltage is 1.35 V typ., and its hysteresis is approx.
0.15 V (Refer to Figure 20).
In the S-25A640B, the detection and the release voltages are 1.20 V typ. (Refer to Figure 21).
Power supply voltage
Detection voltage (−VDET)
1.20 V typ.
Hysteresis
approx. 0.15 V
Release voltage (+VDET)
1.35 V typ.
Cancel the write instruction
Set in write protect (WRDI) automatically
Figure 20 Operation during the Low Power Supply Voltage (S-25A640A)
Power supply voltage
Detection voltage (−VDET)
1.20 V typ.
Release voltage (+VDET)
1.20 V typ.
Cancel the write instruction
Set in write protect (WRDI) automatically
Figure 21 Operation during the Low Power Supply Voltage (S-25A640B)
 Input Pin and Output Pin
1. Connection of input pin
All input pins in this IC have the CMOS structure. Do not set these pins in "High-Z" during operation when you design.
Especially, set the CS input pin in the non-select status "H" during power-on/off and standby. The error write does
not occur as long as the CS pin is in the non-select status "H". Set the CS pin to VCC via a resistor (the pull-up
resistor of 10 kΩ to 100 kΩ).
If the CS pin and the SCK pin change from "L" to "H" simultaneously, data may be input from the SI pin.
To prevent the error for sure, it is recommended to pull down the SCK pin to GND. In addition, it is recommended to
pull up the SI pin, the WP pin and the HOLD pin to VCC, or pull down these pins to GND, respectively. Connecting
the WP pin and the HOLD pin to VCC directly is also possible when these pins are not in use.
2. Equivalent circuit of input pin and output pin
Figure 22 and Figure 23 show the equivalent circuits of input pins in this IC. A pull-up and pull-down elements are
not included in each input pin, pay attention not to set it in the floating state when you design.
Figure 24 shows the equivalent circuit of the output pin. This pin has the tri-state output of "H" / "L" / "High-Z".
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