S-25A640A Datasheet, PDF (17/32 Pages) Seiko Instruments Inc – Function to prevent malfunction by monitoring clock pulse

Rev.3.2_01
CS
FOR AUTOMOTIVE 125°C OPERATION SPI SERIAL E²PROM
S-25A640A, S-25A640B
WP
High / Low
SCK
SI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Instruction
Inputs Data in the Status Register
b7 b6 b5 b4 b3 b2 b1 b0
High-Z
SO
Figure 15 WRSR Operation
6. Read memory data (READ)
The READ operation is shown below. Input the instruction code and the address from serial data input (SI) after
inputting "L" to the chip select ( CS ). The input address is loaded to the internal address counter, and data in the
address is output from the serial data output (SO).
Next, by inputting the serial clock (SCK) keeping the chip select ( CS ) in "L", the address is automatically
incremented so that data in the following address is sequentially output. The address counter rolls over to the first
address by increment in the last address.
To finish the read cycle, set CS to "H". It is possible to raise the chip select always during the cycle. During write,
the READ instruction code is not be accepted or operated.
CS
WP
High / Low
SCK
SI
SO
1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 32
Instruction
16-bit Address
High-Z
A15 A14 A13
A3 A2 A1 A0
Outputs the First Byte
Outputs
the Second
D7 D6 D5 D4 D3 D2 D1 D0 D7
Remark The higher addresses A15 to A13 = Don't care.
Figure 16 READ Operation
17