S93A46A Datasheet, PDF (19/41 Pages) Seiko Instruments Inc – 125C OPERATION 3-WIRE SERIAL

Rev.6.1_00
125°C OPERATION 3-WIRE SERIAL E²PROM FOR AUTOMOTIVE
S-93A46A/56A/66A
 Function to Protect Against Write due to Erroneous Instruction Recognition
The S-93A46A/56A/66A provides a built-in clock pulse monitoring circuit which is used to prevent an erroneous write
operation by canceling write instructions (WRITE, ERASE, WRAL, ERAL) recognized erroneously due to an erroneous
clock count caused by the application of noise pulses or double counting of clocks.
Instructions are cancelled if a clock pulse whose count other than the one specified for each write instruction (WRITE,
ERASE, WRAL, ERAL) is detected.
<Example> Erroneous Recognition of Program Disable Instruction (EWDS) as Erase Instruction (ERASE)
Example of S-93A56A/66A
Noise pulse
CS
1 2 3 4 5 6 7 8 9 10 11
SK
DI
Input EWDS instruction
10000000000
Erroneous recognition as
1 1 10
0
0 00
0
0
0
0
0
0
ERASE instruction due to
noise pulse
In products that do not incorporate a clock pulse monitoring circuit, FFFF is mistakenly
written to address 00h. However the S-93A56A/66A detects the overcount and cancels the
instruction without performing a write operation.
Figure 19 Example of Clock Pulse Monitoring Circuit Operation
Seiko Instruments Inc.
19