S-34C04A Datasheet, PDF (13/22 Pages) Seiko Instruments Inc – FOR DIMM SERIAL PRESENCE DETECT

Rev.1.0_01_U
2-WIRE SERIAL E²PROM FOR DIMM SERIAL PRESENCE DETECT
S-34C04A
1. 3 Software write protect
This IC has set write protection for block n (SWPn), clear write protection for all blocks (CWP) and read protection
status for block n (RPSn).
There are four independent memory blocks, and each block may be independently protected. The memory blocks
are:
• Block 0 = word addresses 00h to 7Fh, page address = 0
• Block 1 = word addresses 80h to FFh, page address = 0
• Block 2 = word addresses 00h to 7Fh, page address = 1
• Block 3 = word addresses 80h to FFh, page address = 1
1. 3. 1 Set write protect (SWPn) and clear write protect (CWP)
If the software write protect has been set with the SWPn instruction, the block n in memory is write-protected.
The four independent blocks are protected by SWPn instructions. The write-protected block can be cleared with
the CWP instruction.
The CWP instruction clears write-protection for all blocks, therefore the CWP instruction can not clear
write-protection for each block.
The SWPn and CWP instructions have the same format as a byte write instruction, but have a different device
select code. Like the byte write instruction, it is followed by an address byte and a data byte, but in this case the
contents can be set in all "Don't care". In the instructions of SWPn and CWP, be sure to apply the high voltage of
VHV to the SA0 pin, and input "H" or "L" to the SA1 pin and SA2 pin.
The device select code for each block is shown in Table 10.
S
W
T
R
A
I
R
T
DEVICE
SELECT CODE
T
E
WORD ADDRESS
S
T
O
DATA
P
SDA LINE
0
1
1
0
Select Address
Signals
0
XXXXXXXX
XXXXXXXX
M
LRA
S
S/C
B
BW K
A
C
K
A
C
K
Remark X: Don't care
Figure 10 Software Write Protect
1. 3. 2 Read protection status (RPSn)
The RPSn are the instructions to find the write protection status in block n. If the block is not protected by SWPn
instruction, this IC generates an acknowledge after the device receives the device select code of the block. If a
certain block is protected by SWPn instruction, this IC does not generate an acknowledge after the device
receives the device select code of the block.
1. 3. 3 Set page address (SPAn)
The SPAn are the instructions to select the lower 256-byte page (SPA0) or the higher 256-byte page (SPA1). The
page address selects the lower 256 bytes (SPA0) after power-on reset.
1. 3. 4 Read page address (RPA)
The RPA are the instructions to find the current page address status. If the current page address is "0", this IC
generates an acknowledge after the device receives the device select code. If the current page address is "1",
this IC does not generate an acknowledge.
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