S-34C04A Datasheet, PDF (12/22 Pages) Seiko Instruments Inc – FOR DIMM SERIAL PRESENCE DETECT

2-WIRE SERIAL E²PROM FOR DIMM SERIAL PRESENCE DETECT
S-34C04A
Rev.1.0_01_U
 E²PROM Operation
1. Write
1. 1 Byte write
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start
condition, this IC generates an acknowledge.
This IC then receives an 8-bit word address and responds with an acknowledge. After this IC receives 8-bit write
data and responds with an acknowledge, it receives a stop condition and that initiates the write cycle at the
addressed memory.
When the certain word address is protected by the write instruction, this IC does not generate an acknowledge
after data byte coding, and write operation is not performed.
During the write operation to this IC, all operations are inhibited to be performed and does not send back an
acknowledge.
S
W
T
R
A
I
R
T
DEVICE
SELECT CODE
T
E
WORD ADDRESS
S
T
O
DATA
P
SDA LINE
1 0 1 0 _{SA2 SA1 SA0} 0 _{W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0}
M
LR A
S
S/ C
B
BW K
A_A
C_C
K_K
A
C
K
Figure 8 Byte Write
1. 2 Page write
The page write mode allows up to 16 bytes to be written in a single write operation in this IC.
Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving
8-bit write data as much data as the page size has.
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start
condition, it generates an acknowledge. Then this IC receives an 8-bit word address, and responds with an
acknowledge. After this IC receives 8-bit write data and responds with an acknowledge, it receives 8-bit write data
corresponding to the next word address, and generates an acknowledge. This IC repeats reception of 8-bit write
data and generation of acknowledge in succession. This IC can receive as many write data as the maximum page
size.
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and
having the page size equal to the received write data.
S
W
T
R
A
I
R
DEVICE
T
T SELECT CODE E
WORD ADDRESS (n)
DATA (n)
DATA (n + 1)
SDA
LINE
1 0 1 0 SA2 SA1 SA0 0 W7W6W5W4W3W2 W1W0 D7 D6 D5 D4 D3 D2 D1 D0 D7
D0 D7
M
LRA
A
A
A
S
S/C
C
C
C
B
BWK
K
K
K
S
T
O
DATA (n + x) P
D0
A
C
K
Figure 9 Page Write
The lower 4 bits of the word address are automatically incremented every time when it receives 8-bit write data. If
the size of the write data exceeds 16 bytes, the higher 4 bits (W7 to W4) of the word address remain unchanged,
and the lower 4 bits are rolled over and the last 16-byte data that this IC received will be overwritten.
12