S-34C04A Datasheet, PDF (10/22 Pages) Seiko Instruments Inc – FOR DIMM SERIAL PRESENCE DETECT

2-WIRE SERIAL E²PROM FOR DIMM SERIAL PRESENCE DETECT
S-34C04A
Rev.1.0_01_U
7. Device addressing
To start communication, the master device on the system generates a start condition to the slave device. Following
this, the master device sends the device select code.
Table 10 Device Select Code
Instruction
Read/write E²PROM^*1
Set write protection, block 0 (SWP0)
Set write protection, block 1 (SWP1)
Set write protection, block 2 (SWP2)
Set write protection, block 3 (SWP3)
Clear all write protection (CWP)
Read SWP0 status (RPS0)
Read SWP1 status (RPS1)
Read SWP2 status (RPS2)
Read SWP3 status (RPS3)
Set page address to 0 (SPA0)
Set page address to 1 (SPA1)
Read page address (RPA)
Device Type Identifier
B7 B6 B5 B4
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
Select Address Signal
B3
B2
B1
SA2 SA1 SA0
0
0
1
1
0
0
1
0
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
0
0
1
1
0
1
1
1
1
1
0
____
R/ W
B0
____
R/ W
0
0
0
0
0
1
1
1
1
0
0
1
SA Pin
SA2 SA1 SA0
SA2 SA1 SA0
−^*2
−^*2 VHV
−^*2
−^*2 VHV
−^*2
−^*2 VHV
−^*2
−^*2 VHV
−^*2
−^*2 VHV
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
−^*2
*1. Slave addresses (SA2, SA1, SA0) are compared by the select address input pins (SA2, SA1, SA0) of a memory device
with the address value which is set beforehand.
*2. Connected to the VSS pin or VDD pin.
The device select code consists of a 4-bit device type identifier, and 3-bit select signals (SA2 pin, SA1 pin, SA0 pin).
To address the memory array, the 4-bit device type identifier is "1010b"; to access the write-protection settings and
the page address settings, it is "0110b".
Up to eight devices can be connected on a single I²C-bus. Address select signals (SA2 pin, SA1 pin, SA0 pin) should
be set on each device, respectively. The device continues the operation only when the received device select code
matches the address select signal.
The SWPn, CWP, RPSn write protect commands and SPAn, RPA page address commands do not use the select
address, therefore all devices on the_{___}I_{_}²C-bus will act on these commands simultaneously.
The 8th bit is the read / write bit (R/ W ). This bit is set to "1" for read and "0" for write operations. If a match occurs on
the device select code, the corresponding device gives an acknowledge on serial data (SDA) during the 9th bit time. If
the device does not match the device select code, This IC goes into standby mode automatically.
Mode
Current address read
Random read
Sequencial read
Byte write
Page write
SWPn and CWP
Set page address
Read page address
*1. X: Don't care
Table 11 Operating Modes
____
R/ W
1
0
1
Byte
1
1
I/O Sequence
____
Start, device select, R/ W = 1, data, stop
____
Start, device select, R/ W = 0, address
____
Restart, device select, R/ W = 1, data, stop
1
≥1
Similar to current address read or random read
____
0
1
Start, device select, R/ W = 0, address, data, stop
____
0
≤ 16
Start, device select, R/ W = 0, address, data, stop
____
0
2
Start, device select, R/ W = 0, X^*1, X^*1, stop
____
0
2
Start, device select, R/ W = 0, X*1, X*1, stop
____
1
2
Start, device select, R/ W = 1, X^*1, X^*1, stop
10