SDA9362 Datasheet, PDF (8/39 Pages) Siemens Semiconductor Group – DDC-PLUS-Deflection Controller

SDA 9362
1.4 Pin Description (cont’d)
Pin No. Symbol Type
27
SW1
Q/TTL
28
VSYNC I/TTL
29
HD
Q
30
TEST
I/TTL
31
TST0
I
32
TST1
I
33
HDEDEF I/TTL
34
SSD
I/TTL
35
TST4
I
36
TST5
O
37
TST6
O
38
V_DD(D)
S
39
V_SS(D)
S
40
TST7
O
41
V_SS(D)
S
42
LF
IQ
43
V_DD(D)
S
44
RESN
I/TTL
Description
Output of an Ι²C Bus controlled switch (Register 00_H,
Bit D3)
V-sync input
Control signal output for H driver stage
Switching normal operation (TEST = L) and test mode
(TEST = H: pin 34 is an additional test pin)
Test pin, to be grounded
Test pin, to be grounded
Defines the default value of HDE
Disables soft start (H)
Test pin, to be grounded
Test pin, don’t connect
Test pin, don’t connect
Digital supply
Digital ground
Test pin, don’t connect
Digital ground
PLL loop filter
Digital supply
Reset input, active low
Semiconductor Group
8
1998-02-01