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HYM322030S Datasheet, PDF (8/9 Pages) Siemens Semiconductor Group – 2M x 32-Bit Dynamic RAM Module
HYM 322030S/GS-60/-70
2M × 32-Bit
AC Characteristics4) 5) (cont’d)
TA = 0 to 70 ˚C, VCC = 5 V ± 10 %, tT = 5 ns
Parameter
Symbol
Limit Values
HYM
322030S/GS-60
HYM
322030S/GS-70
min.
max.
min.
max.
Column address to RAS lead time tRAL
30
–
Read command setup time
tRCS
0
–
Read command hold time
t 8)
RCH
0
–
Read command hold time
tRRH
0
–
ref. to RAS
8)
35
–
0
–
0
–
0
–
Write command hold time
tWCH
10
–
15
–
Write command pulse width
tWP
10
–
15
–
Write command to RAS lead time tRWL
15
–
20
–
Write command to CAS lead time tCWL
15
–
20
–
Data setup time
t 9)
DS
0
–
0
–
Data hold time
t 9)
DH
15
–
15
–
Refresh period
tREF
–
32
–
32
Write command setup time
t 10)
WCS
0
–
0
–
CAS setup time
t 13)
CSR
10
–
10
–
CAS hold time
t 13)
CHR
10
–
10
–
RAS to CAS precharge time
tRPC
5
–
5
–
CAS precharge time
tCP
10
–
10
–
Write to RAS precharge time 13) tWRP
10
–
10
–
Write hold time ref. to RAS
t 13)
WRH
10
–
10
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
Semiconductor Group
568