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HYM322030S Datasheet, PDF (1/9 Pages) Siemens Semiconductor Group – 2M x 32-Bit Dynamic RAM Module | |||
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2M x 32-Bit Dynamic RAM Module
HYM 322030S/GS-60/-70
Advanced Information
⢠2 097 152 words by 32-bit organization
⢠Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
⢠Fast page mode capability
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
⢠Single + 5 V (± 10 %) supply
⢠Low power dissipation
max. 3300 mW active (-60 version)
max. 3025 mW active (-70 version)
CMOS â 22 mW standby
TTL â 44 mW standby
⢠CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
⢠4 decoupling capacitors mounted on
substrate
⢠All inputs, outputs and clocks fully TTL
compatible
⢠72 pin Single in-Line Memory Module
(L-SIM-72-9 ) with 20.32 mm (800 mil) height
⢠Utilizes four 2M à 8 - DRAMs in 400 mil
SOJ-packages
⢠2048 refresh cycles / 32 ms
⢠Tin-Lead contact pads (S - version)
⢠Gold contact pads (GS - version)
Ordering Information
Type
HYM 322030S-60
Ordering Code
Q67100-Q976
Package
L-SIM-72-9
HYM 322030S-70
Q67100-Q977 L-SIM-72-9
HYM 322030GS-60
Q67100-Q2018 L-SIM-72-9
HYM 322030GS-70
Q67100-Q2019 L-SIM-72-9
Description
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
Semiconductor Group
561
09.94
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