SLX24C01 Datasheet, PDF (7/27 Pages) Siemens Semiconductor Group – 1/2 Kbit 128/256 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

SLx 24C01/02/P
3
I²C-Bus Characteristics
The SLx 24C01/02/P devices support a master/slave bidirectional bus oriented protocol
in which the EEPROM always takes the role of a slave.
Master
SCL
SDA
Slave 1
Slave 5
Slave 2
Slave 6
Slave 3
Slave 7
V_CC
Slave 4
Slave 8
V_CC
IES02183
Figure 3
Bus Configuration
Master
Device that initiates the transfer of data and provides the clock for both
transmit and receive operations.
Slave
Device addressed by the master, capable of receiving and transmitting
data.
Transmitter The device with the SDA as output is defined as the transmitter. Due to
the open drain characteristic of the SDA output the device applying a low
level wins.
Receiver The device with the SDA as input is defined as the receiver.
Semiconductor Group
7
1998-07-27