SDA5650 Datasheet, PDF (4/41 Pages) Siemens Semiconductor Group – VPS / PDC-plus Decoder

VPS / PDC-plus Decoder
SDA 5650/X
CMOS
1
General Description
The PDC plus SDA 5650 decoder chip receives all
VPS and 8/30 Format 1 and 2 data together with the
teletext header information for easy identification of
broadcast transmitter. The SDA 5650 includes a
storage capacity of 16 bytes which can be used in
different ways depending on selected modes.
1.1 Features
P-DIP-14-1
• Single chip receiver for PDC data for
Broadcast Data Service Packet (BDSP 8/30/2
according to CCIR teletext system B.)
VPS Data in dedicated line no. 16 of the vertical
blanking interval (VBI)
• Reception of BDSP packet 8/30/1
Unified Date and Time (UDT)
Network indentification code (NIC)
Short program label (SPL)
P-DSO-20-1
• Reception of teletext header row
Bytes no. 14 - 45 containing date, clock time and identification
• On chip data slicer
• Low external component count
• I²C-Bus interface
Communication with external microcontroller
• PDC/VPS operation mode selectable via I²C-Bus register
• Pin and software compatible to PDC/VPS decoder SDA 5649
• 5 V supply voltage
• Video input signal level: 0.7 Vpp to 2.0 Vpp
• Technology: CMOS
• P-DIP-14-1 and P-DSO-20-1 package
Type
SDA 5650
SDA 5650X
Ordering Code
Q67100-H5164
Q67106-H5163
Package
P-DIP-14-1
P-DSO-20-1 (SMD)
Semiconductor Group
4
02.97