SDA5650 Datasheet, PDF (29/41 Pages) Siemens Semiconductor Group – VPS / PDC-plus Decoder

SDA 5650/X
Figure 3
I²C-Bus Timing
Parameter
Clock frequency
Inactive time prior to new transmission start-up
Hold time during start condition
Low-period of clock
High-period of clock
Set-up time for data
Rise time for SDA and SCL signal
Fall time for SDA and SCL signal
Set-up time for SCL clock during stop condition
All values referred to V_IH and V_IL levels.
Symbol
f_SCL
t_BUF
t_{HD; STA}
t_LOW
t_HIGH
t_SU;DAT
t_TLH
t_THL
t_{SU; STO}
Limit Values Unit
min. max.
0
100 kHz
4.7
µs
4.0
µs
4.7
µs
4.0
µs
250
ns
1
µs
300 ns
4.7
µs
Semiconductor Group
29
02.97