SDA5649 Datasheet, PDF (3/26 Pages) Siemens Semiconductor Group – Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder

SDA 5649
SDA 5649X
Pin Definitions and Functions
Pin No.
P-DIP-14-3
1
2
3
4
Pin No.
Symbol
P-DSO-20-1
V_SS
1
V_SSA
2
V_SSD
3
N.C.
4
SCL
5
SDA
6
CS0
5
7
VCS
8
N.C.
6
9
DAVN
7
10
EHB
8
11
TI
9
12
PD1
13
N.C.
10
14
PD2/
VCO2
11
15
VCO1
12
16
I_REF
13
17
CVBS
18
N.C.
14
V_DD
19
V_DDD
20
V_DDA
Function
Ground (0 V)
Analog ground (0 V)
Digital ground (0 V)
Not connected
Serial clock input of I²C-Bus.
Serial data input of I²C-Bus.
Chip select input determining the I²C-Bus addresses:
20_H / 21_H, when pulled low
22_H / 23_H, when pulled high.
Video Composite Sync output from sync slicer used for
PLL based clock generation.
Not connected
Data available output active low, when PDC/VPS data
is received.
Output signaling the presence of the first field active
high.
Test input; activates test mode when pulled high.
connect to ground for operating mode.
Phase detector/charge pump output of data PLL
(DAPLL).
Not connected
Connector of the loop filter for the SYSPLL.
Input to the voltage controlled oscillator #1 of the
DAPLL.
Reference current input for the on-chip analog circuit.
Composite video signal input.
Not connected
Positive supply voltage (+ 5 V nom.).
Positive supply voltage for the digital circuits
(+ 5 V nom.).
Positive supply voltage for the analog circuits
(+ 5 V nom.).
Semiconductor Group
46