SDA5649 Datasheet, PDF (1/26 Pages) Siemens Semiconductor Group – Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder

Expanded Decoder for Program Delivery
Control and Video Program System
EPDC / VPS Decoder
SDA 5649
SDA 5649X
Features
q Single-chip receiver for PDC data, broadcast either
– in Broadcast Data Service Packet (BDSP) 8/30/2
according to CCIR teletext system B, or
– in dedicated line no. 16 of the vertical blanking interval
(VPS)
q Reception of Unified Date and Time (UDT), Network
Identification code (NIC), and Short Program Label (SPL)
broadcast in BDSP 8/30/1
q Reception of bytes no.38 through 45 of teletext header row
containing clock time
q Low external components count
q On-chip data and sync slicer
q I²C-Bus interface for communication with external
microcontroller
q Selection of PDC/VPS operating mode software controlled
by I²C-Bus register
q Pin and software compatible to PDC/VPS Decoder
SDA 5648
q Supply voltage: 5 V ± 10 %
q Video input signal level: 0.7 Vpp to 1.4 Vpp
q Technology: CMOS
q Package: P-DIP-14-3 and P-DSO-20-1
q Operating temperature range: 0 to 70 °C
P-DIP-14-3
P-DSO-20-1
CMOS IC
Type
SDA 5649
SDA 5649X
Ordering Code
Q67100-H5156
Q67106-H5157
Package
P-DIP-14-3
P-DSO-20-1 Tape & Reel
Functional Description
The CMOS circuit SDA 5649 is intended for use in video cassette recorders to retrieve control data
of the PDC system from the data lines broadcast during the vertical blanking interval of a standard
video signal.
The SDA 5649 is devised to handle PDC data transported either in Broadcast Data Service Packet
(BDSP) 8/30 format 2 (bytes no. 13 through 25) of CCIR teletext system B or in the dedicated data
line no. 16 in the case of VPS.
Semiconductor Group
44
12.94