C541U Datasheet, PDF (28/63 Pages) Siemens Semiconductor Group – 8 BIT CMOS MICROCONTROLLER

C541U
SSC Interface
The C541U microcontroller provides a Synchronous Serial Channel unit, the SSC. This interface is
compatible to the popular SPI serial bus interface. Figure 11 shows the block diagram of the SSC.
The central element of the SSC is an 8-bit shift register. The input and the output of this shift register
are each connected via a control logic to the pin P1.3 / SRI (SSC Receiver In) and P1.4 / STO (SSC
Transmitter Out). This shift register can be written to (SFR STB) and can be read through the
Receive Buffer Register SRB.
f _OSC
Clock Divider
...
Clock Selection
Interrupt
STB
Shift Register
SRB
Receive Buffer Register
Pin
Control
Logic
Pin P1.2 / SCLK
Pin P1.3 / SRI
Pin P1.4 / STO
Pin P1.5 / SLS
SCIEN
Int. Enable Reg.
SSCCON
Control Register
Control Logic
SCF
Status Register
Internal Bus
MCB03379
Figure 11
SSC Block Diagram
The SSC has implemented a clock control circuit, which can generate the clock via a baud rate
generator in the master mode, or receive the transfer clock in the slave mode. The clock signal is
fully programmable for clock polarity and phase. The pin used for the clock signal is P1.2/ SCLK.
When operating in slave mode, a slave select input is provided which enables the SSC interface
and also will control the transmitter output. The pin used for this is P1.5 / SLS.
The SSC control block is responsible for controlling the different modes and operation of the SSC,
checking the status, and generating the respective status and interrupt signals.
Semiconductor Group
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