HYB514405BJ Datasheet, PDF (10/25 Pages) Siemens Semiconductor Group – 1M x 4-Bit Dynamic RAM

HYB 514405BJ/BLJ-50/-60/-70
1M x 4 EDO - DRAM
Notes:
1) All voltages are referenced to V_SS.
2) I_CC1, I_CC3, I_CC4 and I_CC6 depend on cycle rate.
3) I_CC1 and I_CC4 depend on output loading. Specified values are obtained with the output open.
4) Address can be changed once or less while RAS = V_il. In case of I_CC4 it can be changed once or less during
a hyper page mode (EDO) cycle
5) An initial pause of 200 µs is required after power-up followed by 8 RAS cycles of which at least one cycle has
to be a refresh cycle, before proper device operation is achieved. In case of using the internal refresh counter,
a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.
6) AC measurements assume t_T = 2 ns.
7) V_{IH (min.)} and V_{IL (max.)} are reference levels for measuring timing of input signals. Transition times are also
measured between V_IH and V_IL.
8) Measured with the specified current load and 100 pF at V_ol = 0.8 V and V_oh = 2.0 V. Access time is determined
by the latter of t_RAC, t_CAC, t_AA, t_CPA , t_OEA. t_CAC is measured from tristate.
9) Operation within the t_{RCD (max.)} limit ensures that t_{RAC (max.)} can be met. t_{RCD (max.)} is specified as a reference point
only. If t_RCD is greater than the specified t_{RCD (max.)} limit, then access time is controlled by t_CAC.
10) Operation within the t_{RAD (max.)} limit ensures that t_{RAC (max.)} can be met. t_{RAD (max.)} is specified as a reference point
only. If t_RAD is greater than the specified t_{RAD (max.)} limit, then access time is controlled by t_AA.
11) Either t_RCH or t_RRH must be satisfied for a read cycle.
12) t_{OFF (max.)}, t_{OEZ (max.)} define the time at which the output achieves the open-circuit conditions and are not
referenced to output voltage levels. t_OFF is referenced from the rising edge of RAS or CAS, whichever occurs
last.
13) Either t_DZC or t_DZO must be satisfied.
14) Either t_CDD or t_ODD must be satisfied.
15) t_WCS, t_RWD, t_CWD and t_AWD are not restrictive operating parameters. They are included in the data sheet as
electrical characteristics only. If t_WCS > t_{WCS (min.)}, the cycle is an early write cycle and data out pin will remain
open-circuit (high impedance) through the entire cycle; if t_RWD > t_{RWD (min.)}, t_CWD > t_{CWD (min.)} and t_AWD > t_{AWD (min.)},
the cycle is a read-write cycle and I/O will contain data read from the selected cells. If neither of the above
sets of conditions is satisfied, the condition of I/O (at access time) is indeterminate.
16) These parameters are referenced to the CAS leading edge in early write cycles and to the WE leading edge
in read-write cycles.
Semiconductor Group
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