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HYB5117805BSJ-50-60 Datasheet, PDF (1/23 Pages) Siemens Semiconductor Group – 2M x 8-Bit Dynamic RAM 2k Refresh
2M × 8-Bit Dynamic RAM
2k Refresh
(Hyper Page Mode-EDO)
HYB 5117805/BSJ-50/-60
HYB 3117805/BSJ-50/-60
Advanced Information
• 2 097 152 words by 8-bit organization
• 0 to 70 °C operating temperature
• Hyper Page Mode-EDO-operation
• Performance:
tRAC
RAS access time
tCAC
CAS access time
tAA
Access time from address
tRC
Read/Write cycle time
tHPC
Hyper page mode (EDO) cycle time
-50 -60
50 60 ns
13 15 ns
25 30 ns
84 104 ns
20 25 ns
• Power dissipation:
Power Supply
Active
TTL Standby
CMOS Standby
HYB 5117805
-50
-60
5 ± 10%
440
385
11
5.5
HYB 3117805
-50
-60
3.3 ± 0.3 V
288
252 mW
7.2
mW
3.6
mW
• Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh
and test mode
• All inputs, outputs and clocks fully TTL (5 V versions) and LV-TTL (3.3 V version)-compatible
• 2048 refresh cycles / 32 ms (2k-refresh)
• Plastic Package: P-SOJ-28-3 400 mil
Semiconductor Group
1
1998-10-01