LRS1383 Datasheet, PDF (14/114 Pages) Sharp Electrionic Components – STACKED CHIP 32M FLASH AND 8M SRAM

LRS1383
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5.6 Block Locking State Transitions upon Command Write⁽⁴⁾
Current State
Result after Lock Command Written (Next State)
State F-WP DQ₁
DQ₀
Set Lock⁽¹⁾
Clear Lock⁽¹⁾
Set Lock-down⁽¹⁾
[000]
0
0
0
[001]
No Change
[011]⁽²⁾
[001]
0
0
1
No Change⁽³⁾
[000]
[011]
[011]
0
1
1
No Change
No Change
No Change
[100]
1
0
0
[101]
No Change
[111]⁽²⁾
[101]
1
0
1
[110]
1
1
0
No Change
[111]
[100]
No Change
[111]
[111]⁽²⁾
[111]
1
1
1
No Change
[110]
No Change
Note:
1. "Set Lock" means Set Block Lock Bit command, "Clear Lock" means Clear Block Lock Bit command and "Set Lock-
down" means Set Block Lock-Down Bit command.
2. When the Set Block Lock-Down Bit command is written to the unlocked block (DQ₀ = 0), the corresponding block is
locked-down and automatically locked at the same time.
3. "No Change" means that the state remains unchanged after the command written.
4. In this state transitions table, assumes that F-WP is not changed and fixed V_IL or V_IH.
5.7 Block Locking State Transitions upon F-WP Transition⁽⁴⁾
Previous State
State
Current State
F-WP
DQ₁
DQ₀
Result after F-WP Transition (Next State)
F-WP = 0 1⁽¹⁾
F-WP = 1 0⁽¹⁾
-
[000]
0
0
0
[100]
-
-
[001]
0
0
1
[101]
-
[110]⁽²⁾
[110]
-
[011]
0
1
1
Other than [110]⁽²⁾
[111]
-
-
[100]
1
0
0
-
[000]
-
[101]
1
0
1
-
[001]
-
[110]
1
1
0
-
[011]⁽³⁾
-
[111]
1
1
1
-
[011]
Note:
1. "F-WP = 0 1" means that F-WP is driven to V_IH and "F-WP = 1 0" means that F-WP is driven to V_IL
2. State transition from the current state [011] to the next state depends on the previous state.
3. When F-WP is driven to V_IL in [110] state, the state changes to [011] and the blocks are automatically locked.
4. In this state transitions table, assumes that lock configuration commands are not written in previous, current and next state.