GX3146 Datasheet, PDF (37/46 Pages) Semtech Corporation – Crosspoint Switch with Trace Equalization and Output De-emphasis

4.12.1.4 APPI External Timing for Auto-Increment Read
P_CS
t _{SCS_r}
P_R/W
t _{SRW_r}
P_ADD
[11:0]
t _{SA_r}
P_DAT
[15:0]
P_ADS
An[11:0]
t _DNZ
t _DO1
t _{HA_r}
Dn [15:0]
t _DX
t _DO2
Dn+1 [15:0]
t _{PW1_r}
t _{ADSH_r}
t _{PW2_r}
t _{HCS_r}
t _{CSH_r}
t _CDZ
t _{HRW_r}
t _RDZ
t _DtXDO2
Dn+2 [15:0]
t _DX
t _{ADSH_r}
t _{PW2_r}
Figure 4-10: External Timing for Auto-Increment Read Cycle
Table 4-16: APPI External Timing Specifications for Auto-Increment Read
Parameter
Symbol
Equiv.
Cycles
Min
Typ
Max
Units
Internal read pipeline delay (0 if one-cycle read)
P_CS LOW before first P_ADS positive edge
P_CS hold time after last P_ADS positive edge
P_R/W HIGH before P_CS negative edge
P_R/W hold time after last P_ADS positive edge
P_ADD[11:0] setup before P_ADS negative edge
P_ADD[11:0] hold after P_ADS positive edge
P_DAT[15:0] out of tristate after P_ADS negative edge
P_DAT[15:0] becomes valid after first P_ADS negative edge
P_DAT[15:0] becomes valid after P_ADS positive edge
P_DAT[15:0] becomes invalid after P_ADS positive edge
P_DAT[15:0] goes tristate after P_CS positive edge
P_DAT[15:0] goes tristate after P_ADS positive edge
P_ADS first LOW pulse width
P_ADS subsequent LOW pulse widths
P_ADS HIGH between pulses
P_CS HIGH before next read/write cycle
—
t_{SCS_r}
t_{HCS_r}
t_{SRW_r}
t_{HRW_r}
t_{SA_r}
t_{HA_r}
t_DNZ
t_DO1
t_DO2
t_DX
t_DZ
t_DZ
t_{PW1_r}
t_{PW2_r}
t_{ADSH_r}
t_{CSH_r}
Frequency during auto-increment read
—
Frequency for back-to-back single reads in auto-increment
mode
—
1
—
—
—
—
—
5.0
—
—
ns
—
5.0
—
—
ns
—
1.5
—
—
ns
—
5.0
—
—
ns
—
0.0
—
—
ns
—
0.0
—
—
ns
2
14.8 —
—
ns
—
—
— 70.0
ns
—
—
— 13.0
ns
—
3.0
—
—
ns
—
12.0 — 45.0
ns
—
12.0 — 45.0
ns
—
70.0 —
—
ns
1.2
8.9
—
—
ns
1.2
8.9
—
—
ns
5
37.0 —
—
ns
—
—
—
56.2
5
MHz
—
—
— 8.54 MHz
GX3146 146 x 146 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-056075 March 2013
www.semtech.com
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