LC87F83C8A Datasheet, PDF (4/31 Pages) Sanyo Semicon Device – FROM 128K byte, RAM 6K byte on-chip 8-bit ETR Microcontroller

LC87F83C8A/C8AU/96A/96AU/64A/64AU
■Subroutine Stack Levels
• 3072 levels maximum (1/2 of capacity of RAM, the stack is allocated in RAM.)
■High-speed Multiplication/Division Instructions
• 16 bits × 8 bits
(5 tCYC execution time)
• 24 bits × 16 bits
(12 tCYC execution time)
• 16 bits ÷ 8 bits
(8 tCYC execution time)
• 24 bits ÷ 16 bits
(12 tCYC execution time)
■Oscillation Circuits and PLL
• RC oscillator circuit (internal):
For system clock
• Main XT crystal oscillator circuit:
For system clock with internal Rf, Rd
• Sub XT crystal oscillator circuit:
For time-of-day clock, for low-speed system clock with internal Rf
and external Rd
• Multifrequency RC oscillator circuit (internal): For system clock
• PLL circuit (internal):
For AM/FM tuner
■System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 222ns, 444ns, 888ns, 1.78μs, 3.55μs, 7.10μs, 14.2μs, 28.4μs,
and 56.8μs.
■PLL Block
• Twelve reference frequencies when main XT is 13.5MHz: 1kHz, 3kHz, 3.125kHz, 5kHz, 6.25kHz, 9kHz, 10kHz,
12.5kHz, 25kHz, 30kHz, 50kHz, and 100kHz
• Range of input frequency
1) AMIN: 0.5 to 40MHz
2) FMIN: 10 to 150MHz
3) HCTR: 0.4 to 12MHz
4) LCTR: 100 to 500kHz
• Supports dead zone control.
• Built-in unlock detection circuit.
■Universal Counter
• This 20-bit counter can be used for frequency measurement.
■Standby Function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) Canceled by system reset, detection VDET0 or occurrence of interrupt.
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The main XT crystal oscillators, RC, and sub XT crystal oscillators automatically stop operation.
2) There are four ways of resetting the HOLD mode.
(1) Setting the Reset pin to the lower level.
(2) Voltage descent detection (VDET1)
(3) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level.
(4) Having an interrupt source established at port 0.
• X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The main XT crystal oscillators, and RC oscillators automatically stop operation.
2) The state of crystal oscillation established when the HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the Reset pin to the low level.
(2) Voltage descent detection (VDET0)
(3) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level.
(4) Having an interrupt source established at port 0.
(5) Having an interrupt source established in the base timer circuit.
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