LC87F83C8A Datasheet, PDF (15/31 Pages) Sanyo Semicon Device – FROM 128K byte, RAM 6K byte on-chip 8-bit ETR Microcontroller

LC87F83C8A/C8AU/96A/96AU/64A/64AU
Continued from preceding page.
Parameter
HALT mode
consumption
current
(Note 7-1)
Symbol
Pins/
Remarks
Conditions
VDD[V]
min
IDDHALT(1)
IDDHALT(2)
VDD1
=VDD2
=VDD4
=AVDD
• HALT mode
• FmCF=13.5MHz crystal oscillation mode
• FmX’tal=32.768kHz by crystal oscillation
mode
• System clock set to 13.5MHz side
• Internal RC oscillation stopped
• Frequency variable RC oscillation stopped
4.5 to 5.5
3.0 to 4.5
• 1/1 frequency division ratio.
Specification
typ
max
unit
2.0
3.0
1.8
2.5
IDDHALT(3)
IDDHALT(4)
• HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX’tal=32.768kHz by crystal oscillation
mode
• System clock set to internal RC oscillation
• Frequency variable RC oscillation stopped
• 1/2 frequency division ratio.
4.5 to 5.5
3.0 to 4.5
0.5
1.0
mA
0.3
0.8
IDDHALT(5)
IDDHALT(6)
• HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX'al=32.768kHz by crystal oscillation
mode.
• Internal RC oscillation stopped
• System clock set to 1MHz with frequency
variable RC oscillation
• 1/2 frequency division ratio.
4.5 to 5.5
3.0 to 4.5
1.0
2.0
0.8
1.5
IDDHALT(7)
IDDHALT(8)
• HALT mode
• FmCF=0Hz (oscillation stopped)
• FmX'al=32.768kHz by crystal oscillation
mode.
• System clock set to 32.768kHz side.
• Internal RC oscillation stopped
• Frequency variable RC oscillation stopped
• 1/2 frequency division ratio.
4.5 to 5.5
3.0 to 4.5
250
500
200
400
Current drain
during HOLD
mode
Current drain
during time-
base clock
HOLD mode
Current drain
during
Intermittent for
clock mode
IDDHOLD(1)
IDDHOLD(2)
VDD1
IDDHOLD(3) VDD1
IDDHOLD(4)
IDDCLOCK(1)
VDD1
=VDD2
=VDD4
=AVDD
IDDCLOCK(2)
• HOLD mode
• Timer HOLD mode
• FmX'tal=32.768kHz by crystal oscillation
mode
• Intermittent for clock mode
• Each 500ms is shifted to a normal mode,
and 20 steps are executed.
• FmCF=0Hz (oscillation stopped)
• FmX'al=32.768kHz by crystal oscillation
mode.
• System clock set to 32.768kHz side.
• Internal RC oscillation stopped
• Frequency variable RC oscillation stopped
• 1/1 frequency division ratio.
4.5 to 5.5
3.0 to 4.5
4.5 to 5.5
3.0 to 4.5
4.5 to 5.5
3.0 to 4.5
1.5
20.0
1.0
18.0
150
300
μA
100
200
250
500
200
400
Note 7-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up
resistors.
General-purpose I/O port "L" output when the above-mentioned data is measured
However, the P0 port is an input setting because of the mode setting
No.A1780-15/31