LC87F2708A Datasheet, PDF (10/21 Pages) Sanyo Semicon Device – CMOS IC FROM 8K byte, RAM 512 byte on-chip 8-bit 1-chip Microcontroller

LC87F2708A
Allowable Operating Range at Ta = -40°C to +85°C, VSS1 = 0V
Parameter
Symbol
Pin/Remarks
Operating
supply voltage
(Note 2-1)
VDD
VDD1
Conditions
0.272μs ≤ tCYC ≤ 100μs
VDD[V]
Specification
min
typ
max
unit
2.7
5.5
Memory
sustaining
supply voltage
VHD
VDD1
RAM and register contents sustained
in HOLD mode
2.0
5.5
High level
input voltage
VIH(1)
• Port 1
• Port 3
Output disabled
2.7 to 5.5
0.3VDD
+0.7
VDD
V
Low level
input voltage
VIH(2)
VIL(1)
RES
• Port 1
• Port 3
Output disabled
2.7 to 5.5 0.75VDD
4.0 to 5.5
VSS
VDD
0.1VDD
+0.4
Instruction
cycle time
(Note 2-2)
VIL(2)
tCYC
RES
2.7 to 4.0
2.7 to 5.5
2.7 to 5.5
VSS
VSS
0.272
0.2VDD
0.25VDD
100 μs
Oscillation
frequency
range
FmHRC(1)
• High-speed RC oscillation
• 40MHz selected as option
• Ta=-20°C to +85°C
4.5 to 5.5
38
40
42
FmHRC(2)
FmHRC(3)
FmHRC(4)
FmHRC(5)
• High-speed RC oscillation
• 40MHz selected as option
• Ta=-40°C to +85°C
• High-speed RC oscillation
• 20MHz selected as option
• Ta=-20°C to +85°C
4.5 to 5.5
3.5 to 5.5
2.7 to 5.5
3.0 to 5.5
37.6
40
36.8
40
32
40
19
20
42.4
43.2
43.2
MHz
21
FmHRC(6)
• High-speed RC oscillation
• 20MHz selected as option
• Ta=-40°C to +85°C
2.7 to 5.5
18.7
20
21.3
FmRC
Medium-speed RC oscillation
2.7 to 5.5
0.5
1.0
2.0
FmSLRC
Low-speed RC oscillation
2.7 to 5.5
15
30
60 kHz
Oscillation
tmsHRC
• When high-speed RC oscillation
stabilization
time
state is switched from stopped to
enabled.
2.7 to 5.5
100 μs
• See Fig. 2.
Note 2-1: Use this product in a voltage range of 3.0 to 5.5V because the minimum release voltage (PORRL) of the
power-on reset (POR) circuit is 2.87V±0.12V.
Note 2-2: Relationship between tCYC and oscillation frequency is as follows:
• When system clock source is set to medium-speed RC oscillation
3/FmRC at a division ratio of 1/1, 6/FmRC at a division ratio of 1/2, 12/FmRC a division ratio of 1/4, and so
forth
• When system clock source is set to high-speed RC oscillation (40MHz selected by optional configuration)
12/FmHRC at a division ratio of 1/1, 24/FmHRC at a division ratio of 1/2, 48/FmHRC a division ratio of 1/4,
and so forth
• When system clock source is set to high-speed RC oscillation (20MHz selected by optional configuration)
6/FmHRC at a division ratio of 1/1, 12/FmHRC at a division ratio of 1/2, 24/FmHRC a division ratio of 1/4,
and so forth
No.A1335-10/21