K4S640432H-UC Datasheet, PDF (9/14 Pages) Samsung semiconductor – 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant)

SDRAM 64Mb H-die (x4, x8, x16)
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C for x16 only)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
ICC5 tRC ≥ tRC(min)
C
ICC6 CKE ≤ 0.2V
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S641632H-TC**
4. K4S641632H-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
CMOS SDRAM
Version
60 70 75
Unit Note
140 115 110 mA
1
1
mA
1
15
mA
6
3
mA
3
30
mA
25
160 140 135 mA
1
160 140 135 mA
2
1
mA
3
400
uA
4
Rev. 1.3 August 2004