K4H641638N Datasheet, PDF (5/10 Pages) Samsung semiconductor – DDR SDRAM Product Guide

General Information
DDR SDRAM
D. DDR SDRAM Module Ordering Information
12
3
4
5
6 7 8 9 10
11
12
MXXXLXXXXXXX-XXX
Memory Module
DIMM Configuration
Data bits
Feature
Depth
Refresh, # of Banks in Comp. & Interface
Speed
Power
PCB revision & Type
Package
Component Revision
Composition Component
1. Memory Module : M
2. DIMM Configuration
3 : DIMM
4 : SODIMM
3. Data Bits
68 : x64 184pin Unbuffered DIMM
81 : x72 184pin ECC unbuffered DIMM
83 : x72 184pin Registered DIMM
12 : x72 184pin Low Profile Registered DIMM
70 : x64 200pin Unbuffered SODIMM
63 : x64 172pin Micro DIMM
4. Feature
L : DDR SDRAM (2.5V VDD)
5. Depth
16 : 16M
32 : 32M
64 : 64M
28 : 128M
56 : 256M
51 : 512M
17 : 16M (for 128Mb/512Mb)
33 : 32M (for 128Mb/512Mb)
65 : 64M (for 128Mb/512Mb)
29 : 128M (for 128Mb/512Mb)
57 : 256M (for 512Mb)
6. Refresh, # of Banks in comp. & Interface
1 : 4K/ 64ms Ref., 4Banks & SSTL-2
2 : 8K/ 64ms Ref., 4Banks & SSTL-2
7. Composition Component
0 : x4
3 : x8
4 : x16
8 : x 4 Stack
9 : x 8 Stack
8. Component Revision
M : 1stGen. A : 2nd Gen.
B : 3rdGen. C : 4th Gen.
D : 5thGen. E : 6th Gen.
F : 7thGen. G : 8th Gen
H : 9thGen. J : 11th Gen.
9. Package
T ^: TSOP II (400mil)
N ^: sTSOP
G ^: FBGA
U : TSOP II^*1 (Lead-Free)
V : sTSOP II^*1 (Lead-Free)
Z : FBGA^*1 (Lead-Free)
(Note 1 : All of Lead-free product are in compliance with RoHS)
10. PCB Revision & Type
0 : Mother PCB
1 : 1st Rev.
2 : 2nd Rev.
3 : 3rd Rev.
S : Reduced layer PCB
11. Temp & Power
C : Commercial Temp.( 0°C ~ 70°C) & Normal Power
L : Commercial Temp.( 0°C ~ 70°C) & Low Power
12. Speed
CC : DDR400 (200MHz @ CL=3, tRCD=3, tRP=3)
B3 : DDR333 (166MHz @ CL=2.5, tRCD=3, tRP=3)
A2 : DDR266 (133MHz @ CL=2 , tRCD=3, tRP=3)
B0 : DDR266 (133MHz @ CL=2.5, tRCD=3, tRP=3)
December 2007