KAB01D100M Datasheet, PDF (4/72 Pages) Samsung semiconductor – Multi-Chip Package MEMORY

KAB0xD100M - TxGP
Figure 2. NAND Flash ARRAY ORGANIZATION
SEC Only
MCP MEMORY
1 Block =32 Pages
= (8K + 256) Words
32K Pages
(=1024 Blocks)
Page Register
(=256 Bytes)
256 Words
8 Words
1 Page = 264 Words
1 Block = 264 Words x 32 Pages
= (8K + 256) Words
1 Device = 264 Words x 32Pages x 1024Blocks
= 132 Mbits
16 bit
Page Register
256 Words
DQ 0 ~ DQ 15
8 Words
DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5
1st Cycle A0
A1
A2
A3
A4
A5
2nd Cycle A9
A10 A11 A12 A13 A14
3rd Cycle A17 A18 A19 A20 A21 A22
NOTE: Column Address : Starting Address of the Register.
* L must be set to "Low"
DQ 6
A6
A15
A23
DQ 7 DQ8 to 15
A7
*L
Column Address
A16
*L
Row Address
*L
*L
(Page Address)
-4-
Revision 1.11
August 2003