S5L1462B Datasheet, PDF (39/43 Pages) Samsung semiconductor – CD and DVD playback

RF SIGNAL PROCESSOR
DEFECT DETECT CIRCUIT
S5L1462B
ABCD
GND
RFRP_FRQ
PEAK
DFCT
DFCT_CP2
GND
PEAK
LONG
DFCT_CP1
CC1 CC2
DFTP DFT
_TH
_TH
GND
-
COMP
+
-
COMP
+
INTERO
DFCT2
DFCT1
PLLDFT
• The DEFECT circuit detects the signal defects from damage to the reflective surface. The defects are detected
in ABCD through high speed PEAK HOLD and low speed PEAK HOLD. DC is added to the high speed PEAK
HOLD output, then compared with the low speed PEAK HOLD output.
• The high speed PEAK HOLD's response time constant is set to Add 0CH's RFRP_FRQ when a DEFECT is
detected. The low speed PEAK HOLD time constant is set by the CAPACITOR connected to the RFRP_FRQ
and CB_DFT block. The rate of change is same for high and low speed PEAK HOLD.
• The DEFECT detecting level for SERVO is set by Add 0DH's DFT_TH, and the DEFECT detecting level for PLL
is set by DFTP_TH. The output of the SERVO's DEFECT is ORING with the INTERRUPT output.
INTERRUPT DEFECT CIRCUIT
INTERI
-
-
VREFA
+
GAIN_INT
VREFA
INTER_
TH
COMP
+
GND
INT_ONB
INTERO
• The Interrupt DEFECT circuit detects signal defects from insulation layer damage during CD/DVD Mode
operation. The ABCDSUM output passes through the external LPF, is amplified by the AMP, then comparatively
output with the Comparator's standard voltage (INTER_TH). The AMP's GAIN is adjusted by the GAIN_INT, and
this interrupt signal's use is determined by INT_ONB.
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