S3C2440X Datasheet, PDF (26/429 Pages) Samsung semiconductor – 16/32-bit RISC microprocessor

PRODUCT OVERVIEW
2003.10.15
S3C2440X
Table 1-3. S3C2440X Signal Descriptions (Sheet 6 of 6)
Signal
Power
VDDalive
VDDi/VDDiarm
VSSi/VSSiarm
VDDi_MPLL
VSSi_MPLL
VDDOP
VDDMOP
VSSOP
RTCVDD
VDDi_UPLL
VSSi_UPLL
VDDA_ADC
VSSA_ADC
I/O
Description
P S3C2440X reset block and port status register VDD(1.2V).
It should be always supplied whether in normal mode or in Sleep mode.
P S3C2440X core logic VDD(1.2V) for CPU.
P S3C2440X core logic VSS
P S3C2440X MPLL analog and digital VDD (1.2 V).
P S3C2440X MPLL analog and digital VSS.
P S3C2440X I/O port VDD(3.3V)
P S3C2440X Memory I/O VDD
3.3V : SCLK up to 100MHz
2.5V : SCLK up to 80MHz
P S3C2440X I/O port VSS
P RTC VDD (3.0V)
(This pin must be connected to power properly if RTC isn't used)
P S3C2440X UPLL analog and digital VDD (1.2V)
P S3C2440X UPLL analog and digital VSS
P S3C2440X ADC VDD(3.3V)
P S3C2440X ADC VSS
NOTE:
1. I/O means input/output.
2. AI/AO means analog input/analog output.
3. ST means schmitt-trigger.
4. P means power.
1-26
Preliminary product information describes products that are in development,
for which full characterization data and associated errata are not yet available
Specifications and information herein are subject to change without notice.