S3C72Q5 Datasheet, PDF (233/330 Pages) Samsung semiconductor – 4-BIT CMOS MICROCONTROLLER

S3C72Q5/P72Q5
RESET
Table 9-1. Hardware Register Values After RESET (Continued)
Hardware Component
or Subcomponent
If RESET Occurs During
Power Down Mode
If RESET Occurs
During Normal Operation
I/O Ports:
Output buffers
Off
Off
Output latches
0
0
Port mode flags (PM)
0
0
Pull-up resistor mode reg (PUMOD0)
0
0
Basic Timer:
Count register (BCNT)
Mode register (BMOD)
Undefined
0
Undefined
0
Watch-dog Timer:
Watch-dog timer mode selection (WDMOD)
A5
A5
Watch-dog timer counter clear flag(WDFLAG)
0
0
Timer/Counter 0:
Count register (TCNT0)
Reference register (TREF0)
Mode register (TMOD0)
Output enable flag (TOE0)
0
0
FFH
FFH
0
0
0
0
Timer/Counter 1:
Count register (TCNT1)
Reference register (TREF1)
Mode register (TMOD1)
0
0
FFH
FFH
0
0
Watch Timer:
Watch timer mode register (WMOD)
0
0
LCD Driver/Controller:
LCD mode register (LMOD0/1)
Display data memory
Output buffers
0
Values retained
Off
0
Undefined
Off
9-3