S3C72Q5 Datasheet, PDF (115/330 Pages) Samsung semiconductor – 4-BIT CMOS MICROCONTROLLER

S3C72Q5/P72Q5
SAM48 INSTRUCTION SET
Name
SCF
RCF
CCF
EI
DI
IDLE
STOP
NOP
SMB
SRB
REF
VENTn
Name
CPSE
JP
JPS
JR
CALL
CALLS
RET
IRET
SRET
Table 5-9. CPU Control Instructions — High-Level Summary
Operand
–
n
n
memc
EMB (0,1)
ERB (0,1)
ADR
Operation Description
Set carry flag to logic one
Reset carry flag to logic zero
Complement carry flag
Enable all interrupts
Disable all interrupts
Engage CPU idle mode
Engage CPU stop mode
No operation
Select memory bank
Select register bank
Reference code
Load enable memory bank flag (EMB) and the enable
register bank flag (ERB) and program counter to vector
address, then branch to the corresponding location
Bytes
1
1
1
2
2
2
2
1
2
2
1
2
Cycles
1
1
1
2
2
2
2
1
2
2
1
2
Table 5-10. Program Control Instructions — High-Level Summary
Operand
R,#im
@HL,#im
A,R
A,@HL
EA,@HL
EA,RR
ADR
ADR
#im
@WX
@EA
ADR
ADR
–
–
–
Operation Description
Compare and skip if register equals #im
Compare and skip if indirect data memory equals #im
Compare and skip if A equals R
Compare and skip if A equals indirect data memory
Compare and skip if EA equals indirect data memory
Compare and skip if EA equals RR
Jump to direct address (14 bits)
Jump direct in page (12 bits)
Jump to immediate address
Branch relative to WX register
Branch relative to EA
Call direct in page (14 bits)
Call direct in page (11 bits)
Return from subroutine
Return from interrupt
Return from subroutine and skip
Bytes
2
2
2
1
2
2
3
2
1
2
2
3
2
1
1
1
Cycles
2+S
2+S
2+S
1+S
2+S
2+S
3
2
2
3
3
4
3
3
3
3+S
5-9