K4D623238B-GC Datasheet, PDF (2/17 Pages) Samsung semiconductor – 64Mbit DDR SDRAM

K4D623238B-GC
Revision History
Revision 1.4 (September 26, 2002)
• Added tCK(min) and tCK(max) at CL=3 and CL=4
Revision 1.3 (March 5, 2002)
• Changed tCK(max) of K4D623238B-GC40 from 7ns to 10ns.
Revision 1.2 (September 1, 2001)
• Added K4D623238B-GL* as a low power part (ICC6=1mA)
• Added ICC7 (Operating current at 4bank interleaving)
• Added 100MHz@CL2
Revision 1.1 (August 2, 2001)
• Changed tCK(max) of K4D623238B-GC45/-50/-55/-60 from 7ns to 10ns.
Revision 1.0 (June 22, 2001)
• Changed VDD/VDDQ of K4D623238B-GC33 from 2.5V to 2.8V.
Revision 0.4 (April 10,2001) - Preliminary Spec
• Added K4D623238B-GC50
• Added K4D623238B-GC55
•Added K4D623238B-GC60
• Defined tWR_A that means write recovery time @ Auto precharge.
Revision 0.3 (February 10, 2001) - Preliminary
• Changed tDAL of K4D623238B-GC45 from 6tCK to 7tCK.
Revision 0.2 (December 13, 2000) - Target Spec
• Defined Target Specification
Revision 0.0 (November 21, 2000)
64M DDR SDRAM
-2-
Rev. 1.4 (Sep. 2002)