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K4R571669D Datasheet, PDF (14/20 Pages) Samsung semiconductor – 256/288Mbit RDRAM(D-die)
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K4R571669D/K4R881869D
Timing Conditions
Table 11: Timing Conditions
Symbol
tCYCLE
tCR, tCF
tCH, tCL
tTR
tDCW
tDR, tDF
tS, tH
tDR1, tDF1
tDR2, tDF2
tCYCLE1
tCH1, tCL1
tS1
tH1
tS2
tH2
tS3
tH3
tS4
tH4
tNPQ
tREADTOCC
tCCSAMTOREAD
tCE
Parameter
CTM and CFM cycle times (-1066)
CTM and CFM cycle times (-800)
CTM and CFM input rise and fall times. Use the minimum value of
these parameters during testing.
CTM and CFM high and low times
CTM-CFM differential (MSE/MS=0/0)
CTM-CFM differential (MSE/MS=1/1)a
CTM-CFM differential only for 1.875ns (MSE/MS=1/0)
Domain crossing window
DQA/DQB/ROW/COL input rise/fall times (20% to 80%). Use the
minimum value of these parameters during testing.
DQA/DQB/ROW/COL-to-CFM set/hold @ t CYCLE=1.875ns
DQA/DQB/ROW/COL-to-CFM set/hold @ t CYCLE=2.50ns
SIO0, SIO1 input rise and fall times
CMD, SCK input rise and fall times
SCK cycle time - Serial control register transactions
SCK cycle time - Power transitions @ t CYCLE=1.875ns
SCK cycle time - Power transitions @ t CYCLE=2.50ns
SCK high and low times @ t CYCLE=1.875ns
SCK high and low times @ t CYCLE=2.50ns
CMD setup time to SCK rising or falling edged @ t CYCLE=1.875ns
CMD setup time to SCK rising or falling edged @ t CYCLE=2.50ns
CMD hold time to SCK rising or falling edged
SIO0 setup time to SCK falling edge
SIO0 hold time to SCK falling edge
PDEV setup time on DQA5..0 to SCK rising edge.
PDEV hold time on DQA5..0 to SCK rising edge.
ROW2..0, COL4..0 setup time for quiet window
ROW2..0, COL4..0 hold time for quiet windowe
Quiet on ROW/COL bits during NAP/PDN entry
Offset between read data and CC packets (same device)
Offset between CC packet and read data (same device)
CTM/CFM stable before NAP/PDN exit
Min
1.875
2.50
0.2
40%
0.0
0.9
-0.1
-0.1
0.2
0.160b
0.200b.c
-
-
1000
7.5
10
3.5
4.25
1.0
1.25
1
40
40
0
5.5
-1
5
4
12
8
2
Direct RDRAM™
Max
2.5
3.33
0.5
60%
1.0
1.0
0.1
0.1
0.45
-
-
5.0
2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
Figure(s)
Figure 56
ns
tCYCLE
tCYCLE
tCYCLE
ns
Figure 56
Figure 56
Figure 43
Figure 56
Figure 62
Figure 57
ns
Figure 57
ns
Figure 59
ns
Figure 59
ns
Figure 59
ns
Figure 59
ns
ns
ns
ns
ns
ns
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
Figure 59
Figure 59
Figure 59
Figure 59
Figure 50
Figure 60
Figure 50
Figure 50
Figure 49
Figure 54
Figure 54
Figure 50
Page 12
Version 1.4 July 2002
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