K4D261638E Datasheet, PDF (14/16 Pages) Samsung semiconductor – 2M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM

K4D261638E
128M DDR SDRAM
AC CHARACTERISTICS (I)
Parameter
Symbol
Row cycle time
tRC
Refresh row cycle time
tRFC
Row active time
tRAS
RAS to CAS delay for Read
tRCDRD
RAS to CAS delay for Write
tRCDWR
Row precharge time
tRP
Row active to Row active
tRRD
Last data in to Row precharge
@Normal Precharge
tWR
Last data in to Row precharge
@Auto Precharge
tWR_A
Last data in to Read command tCDLR
Col. address to Col. address
tCCD
Mode register set cycle time
tMRD
Auto precharge write recovery +
Precharge
tDAL
Exit self refresh to read command tXSR
Power down exit time
tPDEX
Refresh interval time
tREF
-2A
Min Max
15
-
17
-
10 100K
4
-
2
-
5
-
3
-
3
-
3
-
3
-
1
-
2
-
8
-
200
-
3tCK
+tIS
-
7.8
-
-33
Min Max
15
-
17
-
10 100K
4
-
2
-
5
-
3
-
3
-
3
-
3
-
1
-
2
-
8
-
200
-
3tCK
+tIS
-
7.8
-
-36
Min Max
15
-
17
-
10 100K
4
-
2
-
5
-
3
-
3
-
3
-
2
-
1
-
2
-
8
-
200
-
3tCK
+tIS
-
7.8
-
-40
Min Max
13
-
15
-
9
100K
4
-
2
-
4
-
3
-
3
-
3
-
2
-
1
-
2
-
7
-
200
-
3tCK
+tIS
-
7.8
-
Note : 1. For normal write operation, even numbers of Din are to be written inside DRAM
-50
Min Max
12
-
14
-
8
100K
4
-
2
-
4
-
3
-
Unit Note
tCK
tCK
tCK
tCK
tCK
tCK
tCK
3
- tCK 1
3
2
1
2
7
200
3tCK
+tIS
7.8
- tCK 1
- tCK 1
- tCK
- tCK
- tCK
- tCK
-
ns
-
us
AC CHARACTERISTICS (II)
K4D261638E-TC2A
Frequency
Cas Latency tRC
350MHz ( 2.86ns )
4
15
300MHz ( 3.3ns )
4
15
275MHz ( 3.6ns )
4
15
250MHz ( 4.0ns )
3
13
200MHz ( 5.0ns )
3
12
tRFC
17
17
17
15
14
tRAS tRCDRD tRCDWR tRP
10
4
2
5
10
4
2
5
10
4
2
5
9
4
2
4
8
4
2
4
(Unit : Number of Clock)
tRRD
3
3
3
3
3
tDAL Unit
8
tCK
8
tCK
8
tCK
7
tCK
7
tCK
K4D261638E-TC33
Frequency
Cas Latency tRC
300MHz ( 3.3ns )
4
15
275MHz ( 3.6ns )
4
15
250MHz ( 4.0ns )
3
13
200MHz ( 5.0ns )
3
12
tRFC
17
17
15
14
tRAS tRCDRD tRCDWR tRP
10
4
2
5
10
4
2
5
9
4
2
4
8
4
2
4
tRRD
3
3
3
3
tDAL Unit
8
tCK
8
tCK
7
tCK
7
tCK
- 14 -
Rev. 1.2 (Jul. 2003)