STBP423S Datasheet, PDF (1/7 Pages) SamHop Microelectronics Corp. – S uper high dense cell design for extremely low R DS (ON).

S amHop Microelectronics C orp.
S T B / P 4 2 3 S ^Green
Product
Feb.26,2007
P- Channel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
4
VDS S
ID
R DS (ON) ( m Ωı ) Max
- 40V - 65A
9.5 @ VGS = -10V
12.5 @ VGS = -4.5V
F E AT UR E S
S uper high dense cell design for extremely low R DS (ON).
High power and current handling capability.
TO-220 & TO-263 package.
D
GS
S TB S E R IE S
T O -263(DD-P AK )
G
D
S
S TP S E R IE S
TO-220
D
G
S
AB S OL UTE MAXIMUM R ATINGS (TA=25 C unles s otherwis e noted)
P arameter
S ymbol
Limit
Unit
Drain-S ource Voltage
VDS
-40
V
Gate-S ource Voltage
VGS
20
V
a
25 C
Drain C urrent-C ontinuous @ Tc
ID
70 C
-65
-52
A
A
-P ulsed ^b
IDM
-160
A
Drain-S ource Diode Forward C urrent ^a
IS
-65
A
Tc= 25 C
Maximum P ower Dissipation ^a
PD
75
Tc=70 C
52.5
W
Operating Junction and S torage
Temperature R ange
TJ, TSTG
-65 to 175
C
THE R MAL CHAR ACTE R IS TICS
Thermal R esistance, Junction-to-C ase
R JC
2
C /W
Thermal R esistance, Junction-to-Ambient
R JA
6622..55
C /W
1