BD95513MUV_10 Datasheet, PDF (5/18 Pages) Rohm – Switching Regulator with MOS FET for DDR-SDRAM Cores

BD95513MUV
●Reference Data
100
SLLM^TM
80
60
Continuous Mode
40
QLLM
20
0
0.01
0.1
1
10
Io [A]
Fig.1 Io-Efficiency
(VIN=7V,VOUT=2.5V)
Technical Note
100
SLLM^TM
80
60
Continuous Mode
40
QLLM
20
0
0.01
0.1
1
10
Io [A]
Fig.2 Io-Efficiency
(VIN=12V,VOUT=2.5V)
100
80
SLLM^TM
60
Continuous Mode
40
QLLM
20
0
0.01
0.1
1
10
Io [A]
Fig.3 Io-Efficiency
(VIN=19V,VOUT=2.5V)
VOUT
(50mV/div)
2µsec/div
VOUT
(50mV/div)
2µsec/div
VOUT
(50mV/div)
2µsec/div
SW
(10V/div)
IOUT
(2A/div)
Fig.4 Transient Response
(VIN=7V, VOUT=2.5V)
SW
(10V/div)
IOUT
(2A/div)
Fig.5 Transient Response
(VIN=12V, VOUT=2.5V)
SW
(10V/div)
IOUT
(2A/div)
Fig.6 Transient Response
(VIN=19V, VOUT=2.5V)
VOUT
(50mV/div)
2µsec/div
VOUT
(50mV/div)
2µsec/div
VOUT
(50mV/div)
2µsec/div
SW
(10V/div)
IOUT
(2A/div)
Fig.7 Transient Response
(VIN=7V, VOUT=2.5V)
SW
(10V/div)
IOUT
(2A/div)
Fig.8 Transient Response
(VIN=12V, VOUT=2.5V)
SW
(10V/div)
IOUT
(2A/div)
Fig.9 Transient Response
(VIN=19V, VOUT=2.5V)
VOUT
IL
2µsec/div
VOUT
IL
2µsec/div
VOUT
IL
2µsec/div
HG
LG
Fig.10 SLLM^TM Mode
(IOUT=0A)
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HG
LG
Fig.11 SLLM^TM Mode
(IOUT=0.4A)
5/17
HG
LG
Fig.12 1 SLLM^TM Mode
(IOUT=1A)
2010.10- Rev.A