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BD95513MUV_10 Datasheet, PDF (3/18 Pages) Rohm – Switching Regulator with MOS FET for DDR-SDRAM Cores
BD95513MUV
Technical Note
●Electrical Characteristics
(Unless otherwise noted, Ta =25℃, AVIN =12V, VCC =VDD =VREG, EN/CTL=5V, MODE=0V, RFS =180kΩ)
Parameter
Symbol
Limits
Unit
Min. Typ. Max.
Condition
[Whole Device]
AVIN Bias Current 1
IIN1
-
1200 1800 µA
AVIN Bias Current 2
IIN2
-
150 250
µA EXTVCC=5V
AVIN Standby Current
EN Low Voltage
IINstb
-
0
ENlow GND
-
10
µA CTL=EN=0V
0.8
V
EN High Voltage
ENhigh
2.3
-
5.5
V
EN Bias Voltage
IEN
-
12
20
µA
CTL Low Voltage
CTLlow GND
-
0.8
V
CTL High Voltage
CTLhigh 2.3
-
5.5
V
CTL Bias Current
[5V Regulator]
VREG Input Voltage
Maximum Current
[5V Switch]
EXTVCC Input Threshold Voltage
ICTL
VREG
IREG
EVCC_UVLO
-
4.90
100
4.2
1
5.00
-
4.4
6
5.10
-
4.6
µA
V
VIN=6.0 to 25V
IREG=0 to 100mA
mA
V EXTVCC:Sweep up
Switch Resistance
REVCC
-
1.0
2.0
[Under-Voltage Lockout Protection]
AVIN Threshold Voltage
AVIN _ UVLO
4.1
4.3
4.5
Ω
V VCC:Sweep up
AVIN Hysteresis Voltage
VREG Threshold Voltage
dAVIN _ UVLO 100
160
220
mV VCC:Sweep down
VREG_ UVLO
4.1
4.3
4.5
V VREG:Sweep up
VREG Hysteresis Voltage
[H3REGTM Control Block]
ON Time
dVREG_ UVLO 100
160
220
mV VREG:Sweep down
ton
400 500 600 nsec
MAX ON Time
tonmax 10.0 22.0 40.0 µsec
MIN OFF Time
[FET Block]
High-side ON Resistance
toffmin
-
450 550 nsec
Ron_high
-
120 200 mΩ
Low-side ON Resistance
[SCP Block]
SCP Startup Voltage
Delay
Ron_low
-
120 200 mΩ
VSCP
tSCP
0.420 0.490 0.560
-
1
-
V When VFB: 30% down
ms
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3/17
2010.10- Rev.A